Rapid prototyping of nanoelectronic devices

Moore’s law has pushed the specs of today’s transistors to a level that is often beyond reach for conventional direct-write nanolithography. The high throughput manufacturing technologies like EUV or DUV multi-patterning are too expensive for an efficient exploration of new promising materials and designs promising for next generation chips especially for “Beyond Moore” devices. Alternative rapid prototyping methods are required for the development of such novel nanoelectronic devices.


  • High-resolution dense features with low roughness of the line edge
  • Precise overlay of several layers
  • Compatibility with pattern transfer processes
  • Fast turnaround time and flexibility

Application images


Silicon Fins

High-resolution features (below 10 nm width at 14 nm half-pitch) written only a few nanometer deep into PPA with a NanoFrazor Explore and etched into Si. IMEC scientists used these PPA nanostructures to test new SIS (sequential infiltration synthesis) processes for enhanced etch transfer.
Courtesy of imec, Publication in 2018

Single-Electron Transistors

Single-electron transistors in doped Si operating at room temperature. The whole device was patterned in under 5 minutes’ time with the mix&match NanoFrazor system using thermal probe for the sub-25 features and integrated laser writing for the contact wires.
Courtesy of Imperial college and IBM Research, Publication in 2018


Atomic Memristors

Sharp vertical Ag electrodes made with the NanoFrazor tip. The precisely controlled distance to a Pt allowed the atomic filaments to switch on and off at high frequencies (>100 MHz) and low voltages (100 mV).
Courtesy of Prof. Leuthold group at ETH Zurich, Publication in 2019

InAs-nanowire transistors

High-resolution metal top gates placed accurately on top of an InAs nanowire using NanoFrazor patterning and lift-off. The device showed superior behavior with a subthreshold slope very close to the theoretical limit of 60 mV/dec. The key advantage of the NanoFrazor here is that it prevents thin Al2O3 gate oxide from trapping electrons during patterning, which would deteriorate the device performance.
Courtesy of IBM Research, Publication in 2019

Key benefits


  • Ultra-high resolution

    without the need for proximity corrections.

  • In-Situ

    immediate quality control of the nanopatterns.

  • No charge accumulation

    critical insulating layers are not affected by charged particles.

  • Accurate

    without artificial markers and expensive positioning systems.




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