Advanced Packaging

Wafer level packaging and system-in-package

In electronics manufacturing, integrated circuit (IC) packaging is the final stage of semiconductor device fabrication. The integrated circuit is encapsulated in a supporting case, known as a "package", which supports the electrical contacts which connect the device to a circuit board.

The huge variety of ICs in the semiconductor industry all have different packaging requirements: The package type for a particular device depends on different parameters including size, power dissipation, field-operating conditions, and cost. Advanced packaging technologies include BGA, Flip-Chip, CSP, LGA, and PGA.

Multi-chip modules, systems-in-package, as well as heterogeneous integration of dissimilar chips or sensors allow higher integration densities compared to multiple chips on a conventional printed circuit board (PCB). These packages offer advantages in terms of speed, cost, functionality, and ease of integration for system designers.

Depending on packaging method and the technical requirements, different materials need to be structured to implement the required fan out and mapping of the IC contact pads. The materials range from silicon (through-silicon vias) to polymers to ceramics to metals.

What these all have in common is the requirement for a flexible and high-resolution lithography technology. Heidelberg Instruments’ VPG+ systems are designed for flexible production applications and offer high throughput, automatic distortion compensation, and focus following for substrates with low planarity.



Requirements

  • High area throughput reduces production time and cost; high availability and reliability must be guaranteed to maximize uptime
  • High resolution (1 - 2 µm) for devices and back-end processes
  • High CD uniformity and high alignment accuracy to ensure and optimize device uniformity and yield
  • Flexible substrate materials, thicknesses, and sizes are required depending on the packaged devices and application
  • Automatic distortion correction is required to compensate for distortions introduced by the substrate material and the bonded devices

Application images

  

Advanced Packaging

3D and 2.5D packaging allows significantly smaller chips with higher performance compared to other technologies. 3D stacking of separate chips but also 3 dimensional integrated circuits use Through-Silicon-Via (TSV) as interconnects between the chips, dies or wafers.

Key benefits

  

  • Simultaneous exposure

    of up to 4 Million pixels for production grade throughput

  • Fast setup time and flexibility

    for small and medium production batches

  • Automatic distortion correction

    to increase yield by compensating distortions from other fabrication steps

  • Field-proven technology

    for high availability and manufacturing stability and reliability

Products

  

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